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Harish Vemula

Senior Design Engineer at Xilinx

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Email Email: h****@xilinx.com

phone noPhone Number: (***)-***-****

SKILLS:Tools: Cadence (RTL Compiler, Virtuoso, Encounter, Spectre), Synopsys (Hspice, PrimeTime), ModelSim, Aldec Riviera ProProgramming: Verilog, System Verilog, C, Assembly Programming ...

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XILINX

XILINX

  • Employees count Employees 1001-5000
  • Revenue Revenue 1 Billion and Over
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VP-Level
VP-Level

Kathy Rock

Exec Asst to the SVP Global HR

Victor Peng

SVP Programmable Platforms Development

Employees

Cecelia Lowe

Global Briefing Center Coordinator

Michael Lai

Staff Design and Validation Engineer

Kelli Oates

Senior Commodity/Planning Mgr.

Sean Koontz

Sr. Manager - I/O Applications

Frequently Asked Questions Regarding Harish Vemula

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Answer: Harish Vemula is the current Senior Design Engineer at Xilinx.... Read More

Answer: Harish Vemula works Xilinx located at 2100 All Programable, San Jose, California, 95124, United States

Answer: Xilinx's Senior Design Engineer is Harish Vemula

Answer: Harish Vemula contact details:

  • Phone number  :  (***)-***-****
  • Email  :  h****@xilinx.com

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